Journal Papers

J.-P. Kaps, G. Gaubatz, and B. Sunar, "Cryptography on a Speck of Dust", to appear in IEEE Computer Magazine.
J.-P. Kaps, K. Yuksel, and B. Sunar, "Energy Scalable Universal Hashing", IEEE Transactions on Computers, 54(12):1484-1495, December 2005. (PDF)
B. Sunar, An Efficient Basis Conversion Algorithm for Composite Fields with Given Representations IEEE Transactions on Computers, 54(8):992-997, August 2005. (PDF)
S. Baktir and B. Sunar, "Optimal Tower Fields", IEEE Transactions on Computers, 53(10):1231-1243, October 2004. (PDF)
B. Sunar, "A Generalized Method for Constructing Sub-quadratic Complexity Bit-Parallel Multipliers", IEEE Transactions on Computers, 53(9):1097-1105, September 2004. (PDF)
B. Sunar, E. Savas, and C. K. Koc, "Constructing Composite Field Representations for Efficient Conversion", IEEE Transactions on Computers, 52(11):1391-1398, November 2003. (PDF)
B. Sunar and C. M. O'Rourke. "Achieving NTRU with Montgomery Multiplication", IEEE Transactions on Computers, Special Issue on Cryptographic Hardware and Embedded Systems, 52(4)440-448, April, 2003. (PDF)
B. Sunar and C. K. Koc. "An efficient optimal normal basis type II multiplier", IEEE Transactions on Computers, 50(1):83-87, January 2001. (PDF)
J. Guajardo, C. Paar "Itoh-Tsujii inversion in standard basis and its application in Cryptography and codes", to appear in Designs, Codes and Cryptography (gzipped postscript)
T. Blum and C. Paar "High Radix Montgomery Modular Exponentiation on Reconfigurable Hardware", IEEE Transactions on Computers, July 2001, vol. 50, no. 7, pp. 759-764. (PDF) (gzipped postscript)
A. Elbirt, W. Yip, B. Chetwynd, C. Paar "An FPGA-Based Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists", IEEE Transactions on VLSI, August 2001, vol. 9, no. 4, pp. 545-557. (PDF) (gzipped postscript)
B. Sunar and C. K. Koc. "Low-complexity bit-parallel canonical and normal basis multipliers for a class of finite fields", IEEE Transactions on Computers, 47(3), March 1998. (PDF)
D. Bailey, C. Paar, "Efficient Arithmetic in Finite Field Extensions with Application in Elliptic Curve Cryptography", Journal of Cryptology, vol. 14, no. 3, pp. 153-176. (PDF) (gzipped postscript)
B. Sunar and C. K. Koc. "Mastrovito multiplier for all trinomials", IEEE Transactions on Computers, 48(5):522-527, May 1999. (PDF)
G. Orlando, C. Paar, "Squaring Architecture for GF(2^m) and its Applications in Cryptographic Systems", Electronic Letters, June 2000, vol. 36, no. 13, pp. 1116-1117. (PDF) (gzipped postscript)
C. Paar, P. Fleischmann, P. Soria-Rodriguez, "Fast Arithmetic for Public-Key Algorithms in Galois Fields with Composite Exponents", IEEE Transactions on Computers, October 1999, vol. 48, no. 10, pp. 1025-1034. (PDF) (gzipped postscript)
C. Paar, P. Fleischmann, P. Roelse, "Efficient Multiplier Architectures for Galois Fields GF((2ⁿ)⁴)" IEEE Transactions on Computers, February 1998, vol. 47, no. 2, pp. 162-170. (PS)
C. Paar, "A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields" IEEE Transactions on Computers, July 1996, vol. 45, no. 7, pp. 856-861. (PS)
C. Paar, "Algorithmenunabhängige Krypto-Hardware, (Algorithm Independent Crypto Hardware, in German), Datenschutz und Datensicherheit, October 1999, vol. 23, no. 10, pp. 562-564.
J.-P. Kaps, C. Paar, "DES auf FPGAs, (DES on FPGAs, in German) , Datenschutz und Datensicherheit, October 1999, vol. 23, no. 10, pp. 565-569.

Maintained by webmaster@wpi.edu
Last modified: Thursday, 30-Mar-2006 18:08:00 EST